? semiconductor components industries, llc, 2000 april, 2000 rev. 0 1 publication order number: irf830/d
nchannel enhancement mode silicon gate tmos this tmos power fet is designed for high voltage, high speed power switching applications such as switching regulators, converters, solenoid and relay drivers. ? silicon gate for fast switching speeds ? low r ds(on) to minimize onlosses, specified at elevated temperature ? rugged e soa is power dissipation limited ? sourcetodrain diode characterized for use with inductive loads maximum ratings rating symbol value unit drainsource voltage v dss 500 vdc draingate voltage (r gs = 1.0 m w ) v dgr 500 vdc gatesource voltage v gs 20 vdc drain current continuous, t c = 25 c continuous, t c = 100 c peak, t c = 25 c i d 4.5 3.0 18 adc total power dissipation @ t c = 25 c derate above 25 c p d 75 0.6 watts w/ c operating and storage temperature range t j , t stg 55 to 150 c thermal characteristics thermal resistance e junctiontocase e junctiontoambient r q jc r q ja 1.67 62.5 c/w maximum lead temperature for soldering purposes, 1/8 from case for 5 seconds t l 300 c see the mtm4n45 data sheet for a complete set of design curves for the product on this data sheet. design curves of the mtp4n45 are applicable for this product. tmos power fet 4.5 amperes 500 volts r ds(on) = 1.5 w device package shipping ordering information irf830 to220ab 50 units/rail to220ab case 221a style 5 1 2 3 4 pin assignment 1 2 3 source gate drain 4 drain http://onsemi.com ? nchannel d s g
irf830 http://onsemi.com 2 electrical characteristics (t c = 25 c unless otherwise noted) characteristic symbol min max unit off characteristics draintosource breakdown voltage (v gs = 0 vdc, i d = 0.25 madc) v (br)dss 500 e vdc zero gate voltage drain current (v ds = rated v dss , v gs = 0 vdc) (v ds = 0.8 rated v dss , v gs = 0 vdc, t j = 125 c) i dss e e 0.2 1.0 madc gatebody leakage current, forward (v gsf = 20 vdc, v ds = 0) i gss(f) e 100 nadc gatebody leakage current, reverse (v gsr = 20 vdc, v ds = 0) i gss(r) e 100 nadc on characteristics (1) gate threshold voltage (v ds = v gs , i d = 0.25 ma) v gs(th) 2.0 4.0 vdc static draintosource onresistance (v gs = 10 vdc, i d = 2.5 adc) r ds(on) e 1.5 ohm onstate drain current (v gs = 10 v) (v ds 6.75 vdc) i d(on) 4.5 e adc forward transconductance (v ds 6.75 vdc, i d = 2.5 adc) g fs 2.5 e mhos dynamic characteristics input capacitance (v 25 vd v 0vd c iss e 800 pf output capacitance (v ds = 25 vdc, v gs = 0 vdc, f = 1.0 mhz ) c oss e 200 reverse transfer capacitance f 1.0 mhz) c rss e 60 switching characteristics (1) turnon delay time t d(on) e 30 ns rise time (v dd = 200 vdc, i d = 2.5 apk, t r e 30 turnoff delay time ( dd d r g = 15 w ) t d(off) e 55 fall time t f e 30 total gate charge (v 08rtdv q g 22 (typ) 30 nc gatesource charge (v ds = 0.8 rated v dss , v gs = 10 vdc , i d = rated i d ) q gs 12 (typ) e gatedrain charge v gs 10 vdc, i d rated i d ) q gd 10 (typ) e sourcedrain diode characteristics (1) forward onvoltage (i rtdi v sd 1.1 (typ) 1.6 vdc forward turnon time (i s = rated i d , v gs = 0 ) t on limited by stray inductance reverse recovery time v gs 0) t rr 450 (typ) e ns internal package inductance internal drain inductance (measured from the contact screw on tab to center of die) (measured from the drain lead 0.25 from package to center of die) l d 3.5 (typ) 4.5 (typ) e e nh internal source inductance (measured from the source lead 0.25 from package to source bond pad) l s 7.5 (typ) e (1) pulse test: pulse width 300 m s, duty cycle 2%.
irf830 http://onsemi.com 3 package dimensions notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension z defines a zone where all body and lead irregularities are allowed. dim min max min max millimeters inches a 0.570 0.620 14.48 15.75 b 0.380 0.405 9.66 10.28 c 0.160 0.190 4.07 4.82 d 0.025 0.035 0.64 0.88 f 0.142 0.147 3.61 3.73 g 0.095 0.105 2.42 2.66 h 0.110 0.155 2.80 3.93 j 0.018 0.025 0.46 0.64 k 0.500 0.562 12.70 14.27 l 0.045 0.060 1.15 1.52 n 0.190 0.210 4.83 5.33 q 0.100 0.120 2.54 3.04 r 0.080 0.110 2.04 2.79 s 0.045 0.055 1.15 1.39 t 0.235 0.255 5.97 6.47 u 0.000 0.050 0.00 1.27 v 0.045 1.15 z 0.080 2.04 q h z l v g n a k 123 4 d seating plane t c s t u r j to220ab case 221a09 issue z style 5: pin 1. gate 2. drain 3. source 4. drain
irf830 http://onsemi.com 4 on semiconductor and are trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. atypicalo parameters which may be provided in scill c data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including atypicalso must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent r ights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into t he body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. publication ordering information central/south america: spanish phone : 3033087143 (monfri 8:00am to 5:00pm mst) email : onlitspanish@hibbertco.com asia/pacific : ldc for on semiconductor asia support phone : 3036752121 (tuefri 9:00am to 1:00pm, hong kong time) toll free from hong kong & singapore: 00180044223781 email : onlitasia@hibbertco.com japan : on semiconductor, japan customer focus center 4321 nishigotanda, shinagawaku, tokyo, japan 1410031 phone : 81357402745 email : r14525@onsemi.com on semiconductor website : http://onsemi.com for additional information, please contact your local sales representative. irf830/d efet is a trademark of semiconductor components industries, llc. tmos is a registered trademark of semiconductor components industries, llc. north america literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 3036752175 or 8003443860 toll free usa/canada fax : 3036752176 or 8003443867 toll free usa/canada email : onlit@hibbertco.com fax response line: 3036752167 or 8003443810 toll free usa/canada n. american technical support : 8002829855 toll free usa/canada europe: ldc for on semiconductor european support german phone : (+1) 3033087140 (mf 1:00pm to 5:00pm munich time) email : onlitgerman@hibbertco.com french phone : (+1) 3033087141 (mf 1:00pm to 5:00pm toulouse time) email : onlitfrench@hibbertco.com english phone : (+1) 3033087142 (mf 12:00pm to 5:00pm uk time) email : onlit@hibbertco.com european tollfree access*: 0080044223781 *available from germany, france, italy, england, ireland
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